SoC Emulation Engineer (Remote)

Duties

• Develop prototyping and emulationstrategy, flow and environment setup, very familiar with HAPS
• Work closely with algorithm engineers, software engineers, architects and designers to quickly prototype new system and features
• Work closely with firmware and design verification engineers to assist software development and hardware verification

Skills and Responsibilities:

• ASIC/IP RTL toEmulation platforms (Preferred: Zebu/Haps)
• Build model from released RTL
• Generate target platform loadable image(s) test and release the image to Firmware and DV teams.
• Run sanity tests for qualifying release of the image(s)
• Release the model to various team including Functional Validation team, Firmware, DV
• Assist debug of failures providing instrumented model ( Waveform Dumps, in circuit debug) and interfacing with stakeholder.
• Coordinate with Tools team to validate tool and Model release
• FPGA and Emulator flows and methodologies
• Experience with Daughtercards, Speedbridges, Virtual Prototyping
• Hardware emulators, such as ZeBu/Palladium or HAPS/Protium
• Emulationmethodologies, including in-circuit emulation, hybrid systems, or simulation acceleration
• Strong knowledge of Complete Design Cycle to understand the Different IP designs to integrate In the build
• Simulation acceleration knowledge (DPI and Transactors)
• In depth understanding of RTL and Synthesis
• Logic simulation: VCS/NCSIM
• Programming/scripting skills (C, C++, Python)
• Experience with CPU integration is a big plus, especially ARM/RISC-V CPU
• Knowledge of CoreSight/UltraSoC debug infrastructure integration is a plus
• Knowledge of OS kernel and experience in driver development
• Familiarity with IO's such as MIPI CSI & DSI, USB, PCIE, LPDDR
• Experience with FPGA and/or Emulation platforms
• Experience with lab system debug with logic analyzers, scopes, meters etc.

Additional Skills

• PROTOTYPE
• SELF MOTIVATED
• STRUCTURED SOFTWARE
• PROTOTYPING
• PYTHON
• SCRIPTING
• SOC
• TCL
• USB
• ALGORITHM
• ARCHITECTURE
• DEBUG
• FIELD PROGRAMMABLE GATE ARRAY
• FIRMWARE
• LOGIC ANALYZERS
• PCI EXPRESS
• PERFORMANCE MODELING

Job Types: Full-time, Contract

Pay: $53,993.00 - $224,487.00 per year

Schedule:

• 8 hour shift
• Monday to Friday

Education:

• Bachelor's (Preferred)

Experience:

• FPGA or emulation platforms: 5 years (Preferred)
• building models from released RTL's: 3 years (Preferred)
• SoC Emulation: 5 years (Preferred)

Work Location:

• Multiple locations
• Fully Remote